Description: The East Coast Datacom, Inc Tail-Circuit Buffer is designed to provide selectable bi-directional buffering between two data circuits that are operating at nominally the same clock rate and are capable of providing clocking as a DCE. In such cases, the timing of the two circuits is not locked to the same timing source, or may be allowed to deviate from a common timing source for a length of time.

Keywords: elastic buffer, tail circuit buffer, clock buffer, clock fifo, data fifo, data buffer, network timing, tail-circuit buffer, tail circuit, synchronize timing, clock phase, jitter, clock slip buffer for serial interface types of RS-232, V.35, RS-530, RS-422, RS-449, X.21, V.11, and HSSI

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Tail-circuit-buffer.com

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